Vlsi Design of Efficient Architecture in Recursive Pseudo-exhaustive Two-pattern Generation

The aim of built in self-test is to make the machine to test by itself. The best method among the built in self-test is pseudo exhaustive two pattern generation produces the output according to the input given with 16bit generator. The main drawback that occurs in this test pattern generation is maximum delay. It occurs in the carry generator module. In this paper, the method proposed with recursive pseudo exhaustive two pattern generator to reduce the delay is that mixing the block of carry generator and adder in order to minimize the delay that produced while in testing process. A method of approaching the testing problem at the chip level is to appropriate built-in self-test capacity that present inside a chip. In exhaustive testing number of test vector are more which is decreased in pseudo exhaustive testing. Built in self-Test pattern generators are commonly discerned into one-pattern and two-pattern generators.